SELECTED ENGINEERING RECORDS

Workbench

Circuit characterization and supporting records from model evaluation, industrial monitoring, embedded prototypes, and bench hardware.

RD-001: full Sigma-Delta case study →

IC / Mixed-Signal

Circuit design and process-temperature characterization.

IC design · Chipathon 2026 CMOS Schmitt Trigger GF180MCU · 3.3 V · 8T CMOS · Xschem / ngspice Schematic design and process-temperature characterizationNominal ΔVH 0.731 V · minimum ΔVH 0.712 V · 5 corners × 3 temperatures at 3.3 V Open record ↓Close record ↑
Topology

8T Schmitt trigger with regenerative core and output buffer

Designed in GF180MCU as a signal-conditioning block for the DVL receiver chain. The regenerative core creates hysteresis, while the output buffer restores non-inverting polarity and isolates the internal node.

PDK
GF180MCU
Supply
3.3 V
Core
8T CMOS
Xschem schematic 6T regenerative core with M7/M8 output inverter buffer.
Hysteresis / process-temperature summary Nominal: VSPH 1.913 V · VSPL 1.181 V · ΔVH 0.731 V · center 1.547 V.
Time-domain response Triangular input sweep and rail-to-rail output switching from the ngspice testbench.
Process-temperature coverage5 corners × 3 temperatures
Minimum hysteresis0.712 V
Center range1.475–1.615 V

GF180MCU/ngspice sweep summary across 15 process and temperature combinations.

Applied Data / ML

Held-out model evaluation and risk visualization.

Applied data / ML Early Warning Karhutla Riau · 5 km grid · 7-day hotspot risk · LightGBM Per-cell classification + interactive dashboard demoSemifinalist · University Track DATATHON 2026 Open record ↓Close record ↑
Contribution

Model evaluation + dashboard development

The task was to classify hotspot risk per cell over a seven-day window. I worked on model experimentation and evaluation and helped build the dashboard in this team project. Separating environmental features from hotspot history made the operational dependence explicit.

Open dashboard demo ↗
Grid
5 × 5 km
Input window
14 days
Target window
7 days
Evaluation unit
Per cell

The study separates environmental inputs from an operational feature regime that includes hotspot history. Each cell receives one risk value for the full seven-day window.

25 Sep 2023 · dry season Source-paper risk-map illustration.
15 Jan 2023 · wet season Source-paper risk-map illustration.
Team pipeline design Multimodal inputs, 5 × 5 km grid standardization, 14-day input window, 7-day target, model comparison, and evaluation. My contribution focused on the modeling and dashboard layers.

Scope boundary. The study evaluates per-cell risk classification from 14 input days for the following seven-day window, t+1 through t+7. Risk maps are source-paper illustrations. Their embedded annotations are not independently verified final-run metrics. The linked demo currently labels its data as simulated. This work does not claim real-time fire detection or a real-time operational forecasting service.

Industrial / Embedded Systems

Industrial monitoring and embedded prototype work.

Industrial monitoringIndustrial Fire-Suppression MonitoringEbyte ME31 I/O · Modbus TCP/RTU · Node-RED · MySQL · TelegramMonitoring workflow + I/O and communication checksModbus read · state filtering · MySQL logging · dashboard · Telegram alerts Open record ↓Close record ↑
Project scope

Fire-suppression status monitoring workflow

The monitoring workflow needed to carry device status from Modbus I/O to a dashboard, event log, and alerts. I configured the I/O and built Node-RED state handling with MySQL logging and Telegram notifications. The evidence below follows those communication and state-processing paths.

Field I/O
Ebyte ME31
Protocols
Modbus TCP / RTU
Monitoring
Node-RED + MySQL
01 · Field / I/OModule wiring, network addressing, and channel-level functional checks.
02 · System logicModbus read → parsing / RBE → state handling → database, alarm, and notification paths.
03 · Operator outputFire-suppression status dashboard.
Notification pathStatus messages delivered through Telegram.

Scope boundary. This internship work focused on monitoring, Modbus communication, dashboard/database logic, notification flow, and device checks. PLC operation, direct sensor installation, and full plant-production integration were outside this internship scope.

Embedded / IoT / applied MLEMMA Smart CompostingSTM32 prototype · environmental sensing · actuation · IoT monitoring · Decision TreeTeam capstone · Best Impact · DGIP software copyrightSystem prototyping · offline Decision Tree with entropy and information gain Open record ↓Close record ↑
System context

Smart-composting monitoring and control prototype

The team prototype combines STM32 sensing, actuation, and IoT monitoring for composting. My contribution was system prototyping and a Python Decision Tree using entropy and information gain. The code establishes an offline classification proof of concept, with sensor-to-model mapping still incomplete.

Embedded
STM32
ML logic
Decision Tree
Recognition
Best Impact
System architectureEmbedded sensing / actuation connected to monitoring, storage, and decision logic.
Entropy / information gainEntropy, dataset splitting, and information-gain search implemented directly in Python.
Recursive tree constructionNode representation and recursive build logic.
Prototype + recognitionBest Impact · Capstone DTETI UGM 2025. Software copyright registered with DGIP No. 001397406.

ML scope. The Decision Tree is presented as an offline proof of concept. The documented model inputs were not fully mapped to the prototype sensor set, and no final accuracy or F1 result is claimed here.

Supporting Hardware

Shorter build records from schematic to bench.

Discrete analog hardware 4-Stage BJT Amplifier 2N5550 · LTspice · KiCad · fabricated PCB Hand analysis → simulation → PCB → bench measurement 96.8 V/V measured gain · ≈100 V/V target Open record ↓Close record ↑

Target ≈100 V/V. Measured gain was 96.8 V/V after hand analysis, LTspice simulation, PCB implementation, and oscilloscope validation.

Analog / sensor hardware IR Proximity Sensor IR LED · phototransistor · BC547 · LM3914 · PCB Simulation → PCB → physical prototype → bench test Open record ↓Close record ↑

IR source, phototransistor detector, analog stage, and LM3914 indication. Simulated, laid out, assembled, and bench tested.

ENGINEERING EVIDENCE
DATATHON 2026 · RISTEK FASILKOM UISemifinalist · University Track
Certificate of Recognition for Raihan Fauzy Ferdyansyah as Semifinalist, University Track DATATHON 2026, RISTEK Fasilkom UI. Certificate R2026-4349-1480, issued 29 July 2026.

Raihan Fauzy Ferdyansyah · Semifinalist, University Track DATATHON 2026 · RISTEK Fasilkom UI · 29 July 2026.
Certificate ID: R2026-4349-1480. Open certificate PDF ↗